SEALSQ unveils quantum-resistant chip, plans US expansion

SEALSQ Corp (NASDAQ: LAES) announced the Quantum Shield QS7001, a semiconductor chip that embeds NIST-standardized post-quantum cryptography algorithms directly into hardware. The chip will launch in mid-November 2025 following its presentation at the IQT Quantum+AI 2025 Conference in New York City.

The Quantum Shield QS7001 integrates ML-KEM and ML-DSA algorithms in silicon, providing what the company describes as up to 10 times performance gains compared to software implementations. The chip includes side-channel resistance and tamper protection features. Development kits will be available by mid-November 2025, with QVault TPM variants planned for the first half of 2026.

The Geneva-based semiconductor company is evaluating California and Arizona as potential locations for a new Post-Quantum Personalization Center focused on secure chip provisioning for defense, IoT, and space applications. SEALSQ currently operates personalization centers in Switzerland and France, with additional expansions under development in Spain, India, and the Middle East.

The chip addresses security concerns related to quantum computing threats against current encryption methods like ECC and RSA systems. NIST released post-quantum cryptography standards in 2024, and new U.S. and EU mandates require PQC adoption by 2030.

SEALSQ holds Common Criteria EAL5+ and FIPS 140-3 certifications and reports securing over 1.75 billion devices worldwide. The company specializes in post-quantum technology hardware and software solutions for applications including multi-factor authentication, smart energy, healthcare systems, and industrial automation.

The information is based on a company press release.

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